1. Field of the Invention
The present invention relates to an apparatus and method for controlling a data write operation in an optical storage system, and particularly to a write-control apparatus and method used in an optical storage system wherein a write-control signal associated with the write operation is rapidly charged to an adapted level for writing data onto a compact disk (CD) so as to avoid malfunction in data writing.
2. Description of Related Art
Currently, the optical storage systems and corresponding media are becoming more and more popular. Thereby, the electronic devices, such as notebook computers, personal computers, are equipped with a CD re-writer (CD-RW) for writing data, images, etc. to write once read multiple (WORM) or recordable CDs so as to provide a great convenience to users.
Referring to FIG. 1, the architecture of a conventional CD-RW is illustrated. The CD-RW includes a read-control device 10, a write-control device 20, and a read/write head 30. When the conventional CD-RW is desired to read or write data, the read/write head 30 generates a current iD flowing through a laser diode 301 so as to derive a laser light beam to project onto a CD 40 for reading or writing data operations. A monitor diode 302 of the read/write head 30 generates a current iM based on the laser light beam according to the laser diode 301. An operation amplifier 303 generates a feedback control signal FPDO based on the current iM for performing an automatic power control to the read-control device 10 and the write-control device 20.
When reading data, a driving IC 304 of the read/write head 30 only enables a read-enable signal ENR in accompanied with a current iD described as in eq1(a) flowing through the laser diode LD. When writing data, the driving IC 304 of the read/write head 30 enables a read-enable signal ENR and a write-enable signal ENW so that a current iD described as in eq1(b) will pass through the laser diode LD. The current iD in the laser diode can be described as follows:
      i    D    =      {                                                      VRDC                              Rset1                +                                  R                  A                                                      ×            gain1                                                              if              ⁢                                                          ⁢              ENR                        ∈            enable                                                                                                                                                                                                                                                eq            ⁢                                                  ⁢            1            ⁢                          (              a              )                                                                                                                                                                  VRDC                                              Rset1                        +                                                  R                          A                                                                                      ×                    gain1                                    +                                                                                                                                                              ⁢                                                            VWDC                                              Rset2                        +                                                  R                          B                                                                                      ×                    gain2                                                                                                                          if              ⁢                                                          ⁢              ENR                        ,                          ENW              ∈              enable                        ,                                                                                                                                                                                                                                                eq            ⁢                                                  ⁢            1            ⁢                          (              b              )                                          where gain 1 and gain 2 are current gains of the INR and INW channels, VRDC and VWDC are read-control signal and write-control signal, respectively, the RA and RB are internal resistors of the driving IC304.
Obviously, the current iD flowing through the lased diode LD is different as shown in FIG. 2 when the laser diode 301 reads or writes data. Generally, the laser diode 301 needs a large amount of current for writing data to a CD 40.
The circuit of the write control device 20 is illustrated in FIG. 3. The sampling frequency of the sampling and holding circuit 201 is far higher than the variation of the feedback voltage FPDO. Therefore, the output voltage of the sampling and holding circuit 201 is represented by FPDO. The voltages of nodes in the circuit of FIG. 3 are analyzed as the following:dV2=Vref−FPDO VWDC=DAC2+(Rf2/Ri2)*(DAC2−dV2*G12)where Rf2/Ri2≈150. Thus, the output voltage of the operation amplifier 202 is varies from 0.5 to 4.5V. Basically, when the write-control device 20 is to be operated normally, the operation amplifier 202 must operate within a linear region to prevent its output voltage from being saturated. Namely, when the second digital-to-analog control signal DAC2 is approximately equal to dV2*G12, the operation amplifier 202 will operate in the linear region. From the above, it is known that since the write-control device 20 is a negative feedback configuration, the operating point Q will be found automatically. When the write control device 20 operates around the operating point, the voltage of the writing-control signal VWDC delivers to the read/write head 30 will be at a working voltage with little disturbances. The perturbation frequency is about 20 Hz˜20 KHz. Thereby, a capacitor C2 is installed in the circuit for canceling the vibration. Likewise, a capacitor C1 is installed in the read-control device 10 for the same purpose.
When writing data to a CD, a time period control signal WLDON is at a high level. However, the write-control signal VWDC will be charged to an operating voltage slowly as shown in FIG. 4 due to the effects of the capacitor C2. As illustrated, in time period dT, if the write-control signal dose not achieve the operating voltage, the current iD of the laser diode 301 illustrated in formula eq1(b) cannot reach a current sufficient for writing data onto a CD. As a result, a malfunction in writing data to a CD may occur.